数据转换器 英文版【2025|PDF|Epub|mobi|kindle电子书版本百度云盘下载】

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1．BACKGROUND ELEMENTS1

1.1 The Ideal Data Converter1

1.2 Sampling2

1.2.1 Undersampling10

1.2.2 Sampling-time Jitter12

1.3 Amplitude Quantization15

1.3.1 Quantization Noise17

1.3.2 Properties of the Quantization Noise18

1.4 kT/C Noise22

1.5 Discrete and Fast Fourier Transforms25

1.5.1 Windowing26

1.6 Coding Schemes32

1.7 The D/A Converter33

1.7.1 Ideal Reconstruction34

1.7.2 Real Reconstruction34

1.8 The Z-Transform38

References46

2．DATA CONVERTERS SPECIFICATIONS47

2.1 Type of Converter47

2.2 Conditions of Operation48

2.3 Converter Specifications50

2.3.1 General Features50

2.4 Static Specifications51

2.5 Dynamic Specifications60

2.6 Digital and Switching Specifications72

References76

3．NYQUIST-RATE D/A CONVERTERS77

3.1 Introduction77

3.1.1 DAC Applications79

3.1.2 Voltage and Current References80

3.2 Types of Converters81

3.3 Resistor based Architectures82

3.3.1 Resistive Divider83

3.3.2 X-Y Selection85

3.3.3 Settling of the Output Voltage86

3.3.4 Segmented Architectures89

3.3.5 Effect of the Mismatch91

3.3.6 Trimming and Calibration94

3.3.7 Digital Potentiometer97

3.3.8 R-2R Resistor Ladder DAC97

3.3.9 Deglitching106

3.4 Capacitor Based Architectures107

3.4.1 Capacitive Divider DAC107

3.4.2 Capacitive MDAC110

3.4.3 "Flip Around"MDAC112

3.4.4 Hybrid Capacitive-Resistive DACs113

3.5 Current Source based Architectures114

3.5.1 Basic Operation114

3.5.2 Unity Current Generator118

3.5.3 Random Mismatch with Unary Selection121

3.5.4 Current Sources Selection122

3.5.5 Current Switching and Segmentation124

3.5.6 Switching of Current Sources129

3.6 Other Architectures131

References139

4．NYQUIST RATE A/D CONVERTERS141

4.1 Introduction141

4.2 Timing Accuracy143

4.2.1 Metastability error146

4.3 Full-Flash Converters147

4.3.1 Reference Voltages148

4.3.2 Offset of Comparators150

4.3.3 Offset Auto-zeroing152

4.3.4 Practical Limits155

4.4 Sub-Ranging and Two-Step Converters157

4.4.1 Accuracy Requirements159

4.4.2 Two-step Converter as a Non-linear Process164

4.5 Folding and Interpolation165

4.5.1 Double Folding166

4.5.2 Interpolation167

4.5.3 Use of Interpolation in Flash Converters169

4.5.4 Use of Interpolation in Folding Architectures170

4.5.5 Interpolation for Improving Linearity171

4.6 Time-Interleaved Converters174

4.6.1 Accuracy requirements175

4.7 Successive Approximation Converter178

4.7.1 Errors and Error Correction180

4.7.2 Charge Redistribution182

4.8 Pipeline Converters184

4.8.1 Accuracy Requirements187

4.8.2 Digital Correction188

4.8.3 Dynamic Performances194

4.8.4 Sampled-data Residue Generator198

4.9 Other Architectures199

4.9.1 Cyclic(or Algorithmic)Converter199

4.9.2 Integrating Converter200

4.9.3 Voltage-to-Frequency Converter202

References207

5．CIRCUITS FOR DATA CONVERTERS209

5.1 Sample-and-Hold209

5.2 Diode Bridge S＆H210

5.2.1 Diode Bridge Imperfections211

5.2.2 Improved Diode Bridge212

5.3 Switched Emitter Follower213

5.3.1 Circuit Implementation215

5.3.2 Complementary Bipolar S＆H216

5.4 Features of S＆Hs with BJT217

5.5 CMOS Sample-and-Hold222

5.5.1 Clock Feed-through224

5.5.2 Clock Feed-through Compensation226

5.5.3 Two-stages OTA as T＆H227

5.5.4 Use of the Virtual Ground in CMOS S＆H229

5.5.5 Noise Analysis230

5.6 CMOS Switch with Low Voltage Supply235

5.6.1 Switch Bootstrapping238

5.7 Folding Amplifiers240

5.7.1 Current-Folding240

5.7.2 Voltage Folding242

5.8 Voltage-to-Current Converter243

5.9 Clock Generation247

References251

6．OVERSAMPLING AND LOW ORDER ∑△ MODULATORS253

6.1 Introduction253

6.1.1 Delta and Sigma-Delta Modulation255

6.2 Noise Shaping256

6.3 First Order Modulator258

6.3.1 Intuitive Views262

6.3.2 Use of 1-bit Quantization264

6.4 Second Order Modulator265

6.5 Circuit Design Issues267

6.5.1 Offset268

6.5.2 Finite Op-Amp Gain268

6.5.3 Finite Op-Amp Bandwidth272

6.5.4 Finite Op-Amp Slew-Rate273

6.5.5 ADC Non-ideal Operation275

6.5.6 DAC Non-ideal Operation275

6.6 Architectural Design Issues276

6.6.1 Integrator Dynamic Range276

6.6.2 Dynamic Ranges Optimization281

6.6.3 Sampled-data Circuit Implementation288

6.6.4 Noise Analysis289

6.6.5 Quantization Error and Dithering294

6.6.6 Single-bit and Multi-bit296

References301

7．HIGH-ORDER,CT ∑△ CONVERTERS AND ∑△ DAC303

7.1 SNR Enhancement303

7.2 High Order Noise Shaping306

7.2.1 Single Stage Architectures308

7.2.2 Stability Analysis309

7.2.3 Weighted Feedback Summation311

7.2.4 Modulator with Local Feedback314

7.2.5 Chain of Integrators with Distributed Feedback316

7.2.6 Cascaded ∑△ Modulator317

7.2.7 Dynamic range for MASH322

7.3 Continuous-time ∑△ Modulators325

7.3.1 S＆H Limitations326

7.3.2 CT Implementations328

7.3.3 Design of CT from Sampled-Data Equivalent333

7.4 Band-Pass ∑△ Modulator335

7.4.1 Interleaved N-Path Architecture339

7.4.2 Synthesis of the NTF344

7.5 Oversampling DAC346

7.5.1 1-bit DAC347

7.5.2 Double Return-to-zero DAC350

References356

8．DIGITAL ENHANCEMENT TECHNIQUES359

8.1 Introduction359

8.2 Error Measurement360

8.3 Trimming of Elements362

8.4 Foreground Calibration364

8.5 Background Calibration367

8.5.1 Gain and Offset in Interleaved Converters370

8.5.2 Offset Calibration without Redundancy371

8.6 Dynamic Matching374

8.6.1 Butterfly Randomization377

8.6.2 Individual Level Averaging381

8.6.3 Data Weighted Averaging385

8.7 Decimation and Interpolation391

8.7.1 Decimation391

8.7.2 Interpolation395

References399

9．TESTING OF D/A AND A/D CONVERTERS401

9.1 Introduction401

9.2 Test Board403

9.3 Quality and Reliability Test405

9.4 Data Processing407

9.4.1 Best-fit-line407

9.4.2 Sine Wave Fitting408

9.4.3 Histogram Method409

9.5 Static DAC Testing413

9.5.1 Transfer Curve Test414

9.5.2 Superposition of Errors414

9.5.3 Non-linearity Errors416

9.6 Dynamic DAC Testing416

9.6.1 Spectral Features417

9.6.2 Conversion Time419

9.6.3 Glitch Energy420

9.7 Static ADC Testing421

9.7.1 Code Edge Measurement423

9.8 Dynamic ADC Testing424

9.8.1 Time Domain Parameters425

9.8.2 Improving the Spectral Purity of Sine Waves426

9.8.3 Aperture Uncertainty Measure428

9.8.4 Settling-time Measure430

9.8.5 Use of FFT for Testing431

References434

Index435